1. Project introduction:

Circuit editing technology provides rapid prototyping of small design corrections for all aspects of the integrated circuit manufacturing process: after the first wafer debugging, it is used for performance improvement during the ramp-up process; Create a small number of functional chips for beta developers; and solving reliability problems. Circuit editing engineers mill chips to the location of suspected defects and then remove or deposit conductors or insulators in precise geometry. This technology allows IC manufacturers to validate design changes without having to re-rotate the mask and process additional wafers.

2. Application advantages:

Sembcorp Nano can complete low-level repair > 110nm in Tescan chip process and 110nm high-level repair in G4 chip process ≤110nm.

Line modification≥ 45nm process chip, cut off and connect circuit, reserved pad, front line modification.

Bare chips or packaged chips can be repaired, and package backfilling can also be realized, and can be operated with or without GDS.

The laboratory uses a variety of means to combine positioning. Customers can quickly adjust the verification after tapeout, and the long pad can be used to test internal circuitry.